Transfer of the outputs

For the transfer to the CPU, the outputs of the CS31 modules are inputs of the CM574-RS in the CPU communication. For this reason, the output modules in the CM574-RS include IEC outputs (%Q).

Transferring the outputs of the CS31 modules:
CS31 bus outputs

CM574 - COM1

CS31 bus

CM574 - DPR AC500 CPU
QIB %QW %QD %IB %IW %ID %QB %QW QID
DC551_0 Outputs 8-15 1000 500 250 0 0 0 1.0 1.0 1.0
DC551_0 Outputs 16-23 1001 1 1.1
Not used 1002 501 2 1 1.2 1.1
Not used 1003 3 1.3
        Module 4 Byte Output Module 4 Byte Output
DC551_0 Start value 1 (HH) 1004 502 251 4 2 1 1.4 1.2 1.1
DC551_0 Start value 1 (H) 1005 5 1.5
DC551_0 Start value 1 (L) 1006 503 6 3 1.6 1.3
DC551_0 Start value 1 (LL) 1007 7 1.7
DC551_0 End value 1 (HH) 1008 504 252 8 4 2 1.8 1.4 1.2
DC551_0 End value 1 (H) 1009 9 1.9
DC551_0 End value 1 (L) 1010 505 10 5 1.10 1.5
DC551_0 End value 1 (LL) 1011 11 1.11
DC551_0 Start value 2 (HH) 1012 506 253 12 6 3 1.12 1.6 1.3
DC551_0 Start value 2 (H) 1013 13 1.13
DC551_0 Start value 2 (L) 1014 507 14 7 1.14 1.7
DC551_0 Start value 2 (LL) 1015 15 1.15
DC551_0 End value 2 (HH) 1016 508 254 16 8 4 1.16 1.8 1.4
DC551_0 End value 2 (H) 1017 17 1.17
DC551_0 End value 2 (L) 1018 509 18 9 1.18 1.9
DC551_0 End value 2 (LL) 1019 19 1.19
        Module 4 DWORD Output Module 4 DWORD Output
DC551_0 Control byte 1 1020 510 255 20 10 5 1.20 1.10 1.5
DC551_0 Control byte 2 1021   21 1.21
DC551_1 Outputs 8-15 1022 511   22 11 1.22 1.11
DC551_1 Outputs 16-23 1023   23 1.23
        Module 4 Byte Output Module 4 Byte Output
DC551_1_AX522 Anal. output 0 (H) 1024 512 256 24 12 6 1.24 1.12 1.6
DC551_1_AX522 Anal. output 0 (L) 1025 25 1.25
DC551_1_AX522 Anal. output 1 (H) 1026 513 26 13 1.26 1.13
DC551_1_AX522 Anal. output 1 (L) 1027 27 1.27
DC551_1_AX522 Anal. output 2 (H) 1028 514 257 28 14 7 1.28 1.14 1.7
DC551_1_AX522 Anal. output 2 (L) 1029 29 1.29
DC551_1_AX522 Anal. output 3 (H) 1030 515 30 15 1.30 1.15
DC551_1_AX522 Anal. output 3 (L) 1031 31 1.31
DC551_1_AX522 Anal. output 4 (H) 1032 516 258 32 16 8 1.32 1.16 1.8
DC551_1_AX522 Anal. output 4 (L) 1033 33 1.33
DC551_1_AX522 Anal. output 5 (H) 1034 517 34 17 1.34 1.17
DC551_1_AX522 Anal. output 5 (L) 1035 35 1.35
DC551_1_AX522 Anal. output 6 (H) 1036 518 259 36 18 9 1.36 1.18 1.9
DC551_1_AX522 Anal. output 6 (L) 1037 37 1.37
DC551_1_AX522 Anal. output 7 (H) 1038 519 38 19 1.38 1.19
DC551_1_AX522 Anal. output 7 (L) 1039 39 1.39
        2 x Module 4 Word Output 2 x Module 4 Word Output
DC551_1_DC532 Output 16-23 1040 520 260 40 20 10 1.40 1.20 1.10
DC551_1_DC532 Output 24-31 1041 41   1.41
        Module 1 Word Output Module 1 Word Output
Not used 1042 521 260 42 21 10 1.42 1.21 1.10
Not used 1043 43 1.43

In the CPU, the input modules include IEC inputs (%I) and the output modules include IEC outputs (%Q). Consequently, from the CPUs point of view, the inputs of the CS31 module are read as IEC input, and the outputs of the CS31 module are written as output.

The easiest method to transfer the inputs in the PLC program of the CM574-RS is the DPRAM_IO_COPY: DPRAM_IO_COPY

For this purpose, symbolic names are assigned to each first byte on the CS31 bus and in the CPU communication area. For automatic length calculation, the last input byte is required.

In the example, these are:

First_Input_CS31 for %IB1000,

Last_Input_CS31 for %IB1037 and

First_Input_DPR for %QB0

The PLC program (FBD) then includes the instruction:

../_images/677b1281e38c0ef30a33139000eba54e

The transfer of the outputs from the CPU to the CS31 bus is performed analogously. The following symbolic names are entered into the PLC configuration:

First_Output_DPR for %IB0,

First_Output_CS31 for %QB1000 and

Last_Output_CS31 for %QB1041

The PLC program (FBD) then includes the instruction:

../_images/e8581569e38c0c260a33139000eba54e

The entire PLC program on the CM574-RS consists of these two networks or function calls.

Note

It is necessary to use the function block DPRAM_IO_COPY. If SysMemCpy is used instead, data consistency of the I/Os is not guaranteed.