Technical data of the fast outputs (SSI CLK output differential)

Number of channels 2
Reference potential for all outputs Terminals 1.9…4.9  (minus pole of the process supply voltage, signal name ZP)
Common power supply voltage For all outputs: terminals 1.8…4.8 (plus pole of the process supply voltage, signal name UP)
Output voltage for signal 1 ≥ 2.9 V at 10 mA
Output voltage for signal 0 ≤ 1.3 V at 10 mA
Output delay (0->1 or 1->0) Typ. 0.3 µs
Output current ≤ 10 mA
Switching frequency < 1 Mhz (depending on firmware)
Short-circuit proof / overload proof Yes
Overload message (I > 0.1x A) Yes, after ca. 100 ms
Output current limitation Yes, automatic reactivation after short-circuit/overload
Resistance to feedback against 24V signals Yes
Resistance to feedback against reverse polarity No
Max. cable length (shielded) 100 m